Skip to content

GPIO

GPIO (General Purpose I/O) are controllable pins of an MCU/CPU, primarily supporting high/low level input detection and output.

Note

GPIO X10 in the table indicates that the motherboard expansion pins can configure up to 10 GPIOs.

The expansion pin GPIO information for Rockchip platforms is as follows:

Board SoC Platform Expansion Pins
K1 RK3568 Rockchip GPIO X28
K1B RK3568 Rockchip GPIO X14
K3 RK3562 Rockchip GPIO X11
K7 RK3576 Rockchip GPIO X22
K7C RK3576 Rockchip GPIO X23
K8 RK3588 Rockchip GPIO X22

The expansion pin GPIO information for Allwinner platforms is as follows:

Board SoC Platform Kernel Expansion Pins
K2B H618 Allwinner 5.4 GPIO X10
K2C H618 Allwinner 5.4 GPIO X15
K4B T113 Allwinner 5.4 GPIO X22
K5C A133 Allwinner 4.9 GPIO X10

Pin Number Calculation

Rockchip

The ID of a pin on the Rockchip platform consists of the controller (bank) + port + index number (pin), e.g., GPIO1_C4.

Rockchip platform pin number = (Controller x 32) + (Port x 8) + Index Number.

For example, GPIO1_C4 means controller group 1, port number C, index number 4. Pin number = (1 x 32) + (2 x 8) + 4 = 52.

Allwinner

The ID of a pin on the Allwinner platform consists of the controller port + index number (pin), e.g., PH8.

Allwinner platform pin number = (Controller Port x 32) + Index Number.

For example, PH8 means controller group 7, index number 8. Pin number = (7 x 32) + 8 = 232.

You can view the pin number on the motherboard using the command:

cat /d/pinctrl/pio/pins
cat /d/pinctrl/r_pio/pins

gpios Configuration

The GPIO configuration syntax in the device tree varies across platforms. Please check according to the actual platform.

Rockchip

The gpios configuration in the dts node for the Rockchip platform is as follows:

gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
gpios = <&A     B      C>;

Note

&A References the GPIO controller node. Common Rockchip controllers: &gpio0~&gpio7 (General Purpose GPIO).
B Pin identification macro, format RK_<Bank><Number>: - Bank: PA~PD (Port Group).
C Pin polarity / configuration attribute, standard macro definitions: - GPIO_ACTIVE_HIGH (Active High), GPIO_ACTIVE_LOW (Active Low).

Allwinner Kernel 4.9

The gpios configuration in the dts node for the Allwinner platform Kernel 4.9 version is as follows:

gpios = <&pio   PH 0x8 0x0 0x1 0x0 0x1>;
gpios = <&r_pio PL 0x4 0x0 0x1 0x0 0x1>;
gpios = <&A     B  C   D   E   F   G>;

Note

Command Analysis:
&A &pio/&r_pio specifies the pio; use &r_pio for those belonging to cpus (after PL).
B PH/PL specifies the gpio bank.
C 0x8/0x4 specifies which pin within the bank.
D Multiplexing type.
E Pull-up/down, uses default value when 0x1.
F Drive strength, uses default value when 0x0.
G Output level, only valid for output.

Allwinner Kernel 5.4

The gpios configuration in the dts node for the Allwinner platform Kernel 5.4 version is as follows:

gpios = <&pio   PH 8 GPIO_ACTIVE_HIGH>;
gpios = <&r_pio PL 4 GPIO_ACTIVE_HIGH>;
gpios = <&A     B  C D>;

Note

Command Analysis:
&A References the GPIO controller node. Common Allwinner controllers: &pio &r_pio
B GPIO port, Bank: PB ~ PI, PL
C Pin number within the port
D Pin polarity / configuration attribute, standard macro definitions: - GPIO_ACTIVE_HIGH (Active High), GPIO_ACTIVE_LOW (Active Low)

leds Configuration

DTS Configuration

An example leds node configuration is as follows:

leds {
    compatible = "gpio-leds";
    gpio3a4: gpio3a4 {
        label = "gpio3a4";
        gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; // Modify gpios configuration according to the platform
        default-state = "off";
    };
};

sysfs Interface Control

Tip

$gpio refers to the listed control node.

List registered GPIO control nodes:

ls /sys/class/leds/

Control GPIO output level state:

Operation Purpose Execute Command Description
Turn LED ON echo 1 > /sys/class/leds/$gpio/brightness Only applicable for GPIO_ACTIVE_HIGH configuration
Turn LED OFF echo 0 > /sys/class/leds/$gpio/brightness Only applicable for GPIO_ACTIVE_HIGH configuration
Turn LED ON (Active Low) echo 0 > /sys/class/leds/$gpio/brightness Applicable for GPIO_ACTIVE_LOW configuration (level inverted)
Turn LED OFF (Active Low) echo 1 > /sys/class/leds/$gpio/brightness Applicable for GPIO_ACTIVE_LOW configuration (level inverted)

Hardware Usage Example

K7 is used as the operation example here.

  • GPIO3_A4 Pin

Checking the K7 expansion pinout shows that pin 32 is GPIO3_A4.

image-20251110143102413

image-20251110185100746

Check the control node, control GPIO3_A4 to output high level, measure the pin voltage with a multimeter as 1.8V.

root@kickpi-k7:/home/kickpi# su kickpi
kickpi@kickpi-k7:~$ su root
Password: 
root@kickpi-k7:/home/kickpi# ls /sys/class/leds/
4g_pwr  fan  gpio0a5  gpio3a4  gpio3b0  gpio3d0  gpio4b0  mmc0::  sd_pwr  work
root@kickpi-k7:/home/kickpi# echo 1 >  /sys/class/leds/gpio3a4/brightness

sys GPIO Control

When a GPIO is not being used by any other function, it can be controlled via /sys/class/gpio for input/output purposes.

1. Ensure the GPIO is not in use

Note

For GPIO pin number, refer to the previous section Pin Number Calculation.

First, comment out the corresponding GPIO pin. /sys/class/gpio/export can only import unregistered GPIOs.

cat /sys/kernel/debug/pinctrl/pinctrl-rockchip-pinctrl/pinmux-pins

Note

Unregistered: pin 56 (gpio1-24): (MUX UNCLAIMED) (GPIO UNCLAIMED)

2. Control the I/O port

Register pin 56 via /sys/class/gpio/export and control it:

echo  56 > /sys/class/gpio/export

Check if it is generated:

ls /sys/class/gpio/
export  gpio56  gpiochip0  gpiochip352  unexport

Contents of the registered node:

ls /sys/class/gpio/gpio56
active_low  device  direction  edge  power  subsystem  uevent  value

Control the GPIO via the contents under the node, commonly used as follows:

GPIO Mode

Note

in: input; out: output

direction
    in / out
    echo in > /sys/class/gpio/gpio56/direction
    echo out > /sys/class/gpio/gpio56/direction

GPIO Read and High/Low Control

Note

0: low; 1: high

value
    0 / 1
    cat /sys/class/gpio/gpio56/value
    echo 1 > /sys/class/gpio/gpio56/value
    echo 0 > /sys/class/gpio/gpio56/value