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PWM

Note

PWM X2 in the table indicates that the expansion pins can configure up to 2 PWM channels.

The expansion pin PWM information for Rockchip platforms is as follows:

Board SoC Platform Expansion Pins
K1 RK3568 Rockchip PWM X11
K1B RK3568 Rockchip PWM X1
K3 RK3562 Rockchip PWM X1
K7 RK3576 Rockchip PWM X7
K7C RK3576 Rockchip PWM X7
K8 RK3588 Rockchip PWM X7

The expansion pin PWM information for Allwinner platforms is as follows:

Board SoC Platform Expansion Pins
K2B H618 Allwinner PWM X2
K2C H618 Allwinner PWM X2
K4B T113-S3 Allwinner PWM X4
K5C A133 Allwinner None

PWM Node Information

H618

The H618 platform supports 4 PWM channels. Node information is as follows:

Node pin
pwm1: pwm1@300a011 PG19, PH3, PI11
pwm2: pwm2@300a012 PH2, PI12
pwm3: pwm3@300a013 PH0, PI13
pwm4: pwm4@300a014 PH1, PI14

T113

The T113 platform supports 8 PWM channels. Node information is as follows:

Node pin
pwm0: pwm0@2000c10 PB5, PD16, PG12
pwm1: pwm1@2000c11 PB6, PD17, PG6
pwm2: pwm2@2000c12 PD18, PE8, PG13
pwm3: pwm3@2000c13 PD19, PE9, PG10
pwm4: pwm4@2000c14 PD20, PE10, PG5
pwm5: pwm5@2000c15 PD21, PF6, PE13, PG4
pwm6: pwm6@2000c16 PD9, PF4, PG1
pwm7: pwm7@2000c17 PD22, PG0

A133

The A133 platform supports 5 PWM channels. Node information is as follows:

Node pin
pwm0: pwm0@0300a000 PD23
pwm1: pwm1@0300a000 PB10, PD22
pwm2: pwm2@0300a000 PD20
pwm3: pwm3@0300a000 PD21
pwm4: pwm4@0300a000 PL10

RK3562

Note

pwm0m0_pins represents pin set 0 for PWM0 controller, pwm0m1_pins represents pin set 1 for PWM0 controller.
If a PWM controller has multiple pin sets, only one set can be configured for use at a time.

The RK3562 platform supports 16 PWM channels. Node information is as follows:

Node pinctrl
pwm0: pwm@ff230000 pwm0m0_pins
pwm0m1_pins
pwm1: pwm@ff230010 pwm1m0_pins
pwm1m1_pins
pwm2: pwm@ff230020 pwm2m0_pins
pwm2m1_pins
pwm3: pwm@ff230030 pwm3m0_pins
pwm3m1_pins
pwm4: pwm@ff700000 pwm4m0_pins
pwm4m1_pins
pwm5: pwm@ff700010 pwm5m0_pins
pwm5m1_pins
pwm6: pwm@ff700020 pwm6m0_pins
pwm6m1_pins
pwm7: pwm@ff700030 pwm7m0_pins
pwm7m1_pins
pwm8: pwm@ff710000 pwm8m0_pins
pwm8m1_pins
pwm9: pwm@ff710010 pwm9m0_pins
pwm9m1_pins
pwm10: pwm@ff710020 pwm10m0_pins
pwm10m1_pins
pwm11: pwm@ff710030 pwm11m0_pins
pwm11m1_pins
pwm12: pwm@ff720000 pwm12m0_pins
pwm12m1_pins
pwm13: pwm@ff720010 pwm13m0_pins
pwm13m1_pins
pwm14: pwm@ff720020 pwm14m0_pins
pwm14m1_pins
pwm15: pwm@ff720030 pwm15m0_pins
pwm15m1_pins

RK3568

Note

pwm0m0_pins represents pin set 0 for PWM0 controller, pwm0m1_pins represents pin set 1 for PWM0 controller.
If a PWM controller has multiple pin sets, only one set can be configured for use at a time.

The RK3568 platform supports 16 PWM channels. Node information is as follows:

Node pinctrl
pwm0: pwm@fdd70000 pwm0m0_pins
pwm0m1_pins
pwm1: pwm@fdd70010 pwm1m0_pins
pwm1m1_pins
pwm2: pwm@fdd70020 pwm2m0_pins
pwm2m1_pins
pwm3: pwm@fdd70030 pwm3_pins
pwm4: pwm@fe6e0000 pwm4_pins
pwm5: pwm@fe6e0010 pwm5_pins
pwm6: pwm@fe6e0020 pwm6_pins
pwm7: pwm@fe6e0030 pwm7_pins
pwm8: pwm@fe6f0000 pwm8m0_pins
pwm8m1_pins
pwm9: pwm@fe6f0010 pwm9m0_pins
pwm9m1_pins
pwm10: pwm@fe6f0020 pwm10m0_pins
pwm10m1_pins
pwm11: pwm@fe6f0030 pwm11m0_pins
pwm11m1_pins
pwm12: pwm@fe700000 pwm12m0_pins
pwm12m1_pins
pwm13: pwm@fe700010 pwm13m0_pins
pwm13m1_pins
pwm14: pwm@fe700020 pwm14m0_pins
pwm14m1_pins
pwm15: pwm@fe700030 pwm15m0_pins
pwm15m1_pins

RK3576

Note

pwm0m0_ch0 represents pin set 0 for channel 0 of PWM0 controller, pwm0m1_ch0 represents pin set 1 for channel 0 of PWM0 controller.
If a PWM controller has multiple pin sets, only one set can be configured for use at a time.

The RK3576 platform supports 16 PWM channels. Node information is as follows:

Node pinctrl
pwm0_2ch_0: pwm@27330000 pwm0m0_ch0
pwm0m1_ch0
pwm0m2_ch0
pwm0m3_ch0
pwm0_2ch_1: pwm@27331000 pwm0m0_ch1
pwm0m1_ch1
pwm0m2_ch1
pwm0m3_ch1
pwm1_6ch_0: pwm@2add0000 pwm1m0_ch0
pwm1m1_ch0
pwm1m2_ch0
pwm1m3_ch0
pwm1_6ch_1: pwm@2add1000 pwm1m0_ch1
pwm1m1_ch1
pwm1m2_ch1
pwm1m3_ch1
pwm1_6ch_2: pwm@2add2000 pwm1m0_ch2
pwm1m1_ch2
pwm1m2_ch2
pwm1m3_ch2
pwm1_6ch_3: pwm@2add3000 pwm1m0_ch3
pwm1m1_ch3
pwm1m2_ch3
pwm1m3_ch3
pwm1_6ch_4: pwm@2add4000 pwm1m0_ch4
pwm1m1_ch4
pwm1m2_ch4
pwm1m3_ch4
pwm1_6ch_5: pwm@2add5000 pwm1m0_ch5
pwm1m1_ch5
pwm1m2_ch5
pwm1m3_ch5
pwm2_8ch_0: pwm@2ade0000 pwm2m0_ch0
pwm2m1_ch0
pwm2m2_ch0
pwm2m3_ch0
pwm2_8ch_1: pwm@2ade1000 pwm2m0_ch1
pwm2m1_ch1
pwm2m2_ch1
pwm2m3_ch1
pwm2_8ch_2: pwm@2ade2000 pwm2m0_ch2
pwm2m1_ch2
pwm2m2_ch2
pwm2m3_ch2
pwm2_8ch_3: pwm@2ade3000 pwm2m0_ch3
pwm2m1_ch3
pwm2m2_ch3
pwm2m3_ch3
pwm2_8ch_4: pwm@2ade4000 pwm2m0_ch4
pwm2m1_ch4
pwm2m2_ch4
pwm2m3_ch4
pwm2_8ch_5: pwm@2ade5000 pwm2m0_ch5
pwm2m1_ch5
pwm2m2_ch5
pwm2m3_ch5
pwm2_8ch_6: pwm@2ade6000 pwm2m0_ch6
pwm2m1_ch6
pwm2m2_ch6
pwm2m3_ch6
pwm2_8ch_7: pwm@2ade7000 pwm2m0_ch7
pwm2m1_ch7
pwm2m2_ch7
pwm2m3_ch7

RK3588

Note

pwm0m0_pins represents pin set 0 for PWM0 controller, pwm0m1_pins represents pin set 1 for PWM0 controller, and so on.
Only one pin set can be configured for use per PWM controller.

The RK3588 platform supports 16 PWM channels. Node information is as follows:

Node pinctrl
pwm0: pwm@fd8b0000 pwm0m0_pins
pwm0m1_pins
pwm0m2_pins
pwm1: pwm@fd8b0010 pwm1m0_pins
pwm1m1_pins
pwm1m2_pins
pwm2: pwm@fd8b0020 pwm2m0_pins
pwm2m1_pins
pwm3: pwm@fd8b0030 pwm3m0_pins
pwm3m1_pins
pwm3m2_pins
pwm3m3_pins
pwm4: pwm@febd0000 pwm4m0_pins
pwm5: pwm@febd0010 pwm5m0_pins
pwm5m1_pins
pwm6: pwm@febd0020 pwm6m0_pins
pwm6m1_pins
pwm7: pwm@febd0030 pwm7m0_pins
pwm7m1_pins
pwm7m2_pins
pwm8: pwm@febe0000 pwm8m0_pins
pwm8m1_pins
pwm8m2_pins
pwm9: pwm@febe0010 pwm9m0_pins
pwm9m1_pins
pwm9m2_pins
pwm10: pwm@febe0020 pwm10m0_pins
pwm10m1_pins
pwm10m2_pins
pwm11: pwm@febe0030 pwm11m0_pins
pwm11m1_pins
pwm11m2_pins
pwm11m3_pins
pwm12: pwm@febf0000 pwm12m0_pins
pwm12m2_pins
pwm13: pwm@febf0010 pwm13m0_pins
pwm13m1_pins
pwm13m2_pins
pwm14: pwm@febf0020 pwm14m0_pins
pwm14m1_pins
pwm14m2_pins
pwm15: pwm@febf0030 pwm15m0_pins
pwm15m1_pins
pwm15m2_pins
pwm15m3_pins

DTS Node Configuration

Example configuration for enabling PWM1 function on Rockchip platform:

&pwm1 {
    status = "okay";
    pinctrl-0 = <&pwm1m0_pins>;
};

Example configuration for enabling PWM2 function on Allwinner platform Kernel 4.9:

pwm: pwm@0300a000 {
    compatible = "allwinner,sunxi-pwm";
    reg = <0x0 0x0300a000 0x0 0x3c>; // Register address configuration
    pwm-number = <2>; // Number of PWMs
    pwm-base = <0x0>; // Starting index of PWMs
    pwms = <&pwm0>, <&pwm2>;
};

&pwm2 {
    pinctrl-0 = <&pwm2_pin_a>;
    pinctrl-1 = <&pwm2_pin_b>;
    status = "okay";
};

Example configuration for enabling PWM2 function on Allwinner platform Kernel 5.4:

pwm2: pwm2@2000c12 {
    compatible = "allwinner,sunxi-pwm2";
    pinctrl-names = "active", "sleep";
    reg = <0x0 0x02000c12 0x0 0x4>;
    reg_base = <0x02000c00>;
};

&pwm2 {
    pinctrl-0 = <&pwm2_pin_a>;
    pinctrl-1 = <&pwm2_pin_b>;
    status = "okay";
};

Usage Instructions

  • List registered PWM controller nodes:
ls /sys/class/pwm/
  • View PWM0 controller information:
cat /sys/class/pwm/pwmchip0/device/uevent

Note

The OF_FULLNAME= information in the controller info corresponds to the PWM node information.

  • Export node for channel 0 of PWM0 controller:
echo 0 > /sys/class/pwm/pwmchip0/export
  • Configure period of channel 0 for PWM0 controller to 10000 ns:
echo 10000 > /sys/class/pwm/pwmchip0/pwm0/period
  • Configure duty cycle of channel 0 for PWM0 controller to 5000 ns:
echo 5000 > /sys/class/pwm/pwmchip0/pwm0/duty_cycle
  • Configure polarity of channel 0 for PWM0 controller to default:
echo normal > /sys/class/pwm/pwmchip0/pwm0/polarity
  • Invert polarity of channel 0 for PWM0 controller:
echo inversed > /sys/class/pwm/pwmchip0/pwm0/polarity
  • Enable channel 0 function for PWM0 controller:
echo 1 > /sys/class/pwm/pwmchip0/pwm0/enable
  • Disable channel 0 function for PWM0 controller:
echo 0 > /sys/class/pwm/pwmchip0/pwm0/enable

Test Example

  • View PWM Pin

For example, PWM0_CH1_M0 on K7 is located at pin 14.

image-20251110153230437

Set the PWM0_CH1_M0 channel, corresponding to pwmchip0, with a period of 10000ns, duty cycle of 5000ns, and polarity 'normal'. After successful configuration, you can use an oscilloscope to measure the PWM0_CH1_M0 pin and observe the waveform.

root@kickpi-k7:/home/kickpi# su kickpi
kickpi@kickpi-k7:~$ su root
Password:
root@kickpi-k7:/home/kickpi# ls /sys/class/pwm/pwmchip0/device
driver           modalias  power  subsystem                  uevent
driver_override  of_node   pwm    supplier:platform:pinctrl
root@kickpi-k7:/home/kickpi#
root@kickpi-k7:/home/kickpi# cat /sys/class/pwm/pwmchip0/device/uevent
DRIVER=rockchip-pwm
OF_NAME=pwm
OF_FULLNAME=/pwm@27331000
OF_COMPATIBLE_0=rockchip,rk3576-pwm
OF_COMPATIBLE_N=1
MODALIAS=of:NpwmT(null)Crockchip,rk3576-pwm
root@kickpi-k7:/home/kickpi#
root@kickpi-k7:/home/kickpi# echo 0 > /sys/class/pwm/pwmchip0/export
root@kickpi-k7:/home/kickpi# echo 10000 > /sys/class/pwm/pwmchip0/pwm0/period
root@kickpi-k7:/home/kickpi# echo 5000 > /sys/class/pwm/pwmchip0/pwm0/duty_cycle
root@kickpi-k7:/home/kickpi# echo normal > /sys/class/pwm/pwmchip0/pwm0/polarity
root@kickpi-k7:/home/kickpi# echo 1 > /sys/class/pwm/pwmchip0/pwm0/enable